The present invention relates to a semiconductor device and an electronic device, and mainly to a semiconductor device having a BGA (Ball Grid Array) structure and a technology effective for application to a power supply technique of an electronic device equipped with the semiconductor device.
It has been reported that Unexamined Patent Publication No. Hei 9(1997)-22977 (hereinafter called Reference 1) and Unexamined Patent Publication No. Hei 11(1999)-324886 (hereinafter called Reference 2) exist as ones considered to be those related to the invention of the present application as a result of investigations of the known examples subsequent to the completion of the invention of the present application. Reference 1 has proposed a BGA structure wherein signal pads, ground pads and power pads are alternately disposed and wires are made substantially parallel and approximately identical in length to thereby reduce noise or the like. Power and ground wires are intensively provided between internal and external terminals to thereby reduce the number of the external terminals. In Reference 2, rewiring layers are used on a chip to form plane layers, and the plane layers are used to unify wirings, thereby reducing the number of flip-chip bumps on the semiconductor chip.
As a technology of reducing external power terminals with respect to power supply electrodes provided for the semiconductor chip, there is known a technology of a bus bar comprised of a lead frame used in a DRAM or the like. In the bus bar technology, a plurality of power supply pads are provided for a semiconductor chip and respectively bonded onto one lead frame by bonding wires to thereby reduce the number of the external power terminals. Namely, the lead frame is used as part of power wirings.